Working of UJT

Working of UJT

1. If voltage is applied at V_BB with emitter open, a voltage gradient is established along the n-type bar. Since the emitter is located nearer to B₂, more than half of V_BB appears between the emitter and B₁, the voltage V₁ between emitter and B₁ establishes a reverse bias on the pn junction and the emitter current is cutoff.

2. If a positive voltage is applied at the emitter, the pn junction will remain reverse biased so long as the input voltage is less than V₁. If the input voltage to the emitter exceeds V₁, the pn junction becomes forward biased. Under these conditions, holes are injected from p-type material in to the n-type bar. These holes are repelled by positive B₂ terminal and they are attracted towards B₁ terminal of the bar. This accumulation of holes in the emitter to B₁ region results in the decrease of resistance in this section of the bar. The result is that internal voltage drop from emitter to B₁ is decreased and hence the emitter current I_E increases. As more holes are injected a condition of saturation will eventually be reached. At this point, the emitter current is limited by emitter power supply only. The device is now in the ON state.

                                                                              EQUIVALENT CURCUIT OF UJT

3. If a negative voltage is applied to the emitter, the pn junction is reverse biased and the emitter current is cutoff. The device is then said to be in the OFF state.

Interbase Resistance: The resistance of silicon bar is called the Interbase resistance R_BB

                 R_BB = R_B1 + R_B2

The value of R_BB lies between 4 KΩ to 10 KΩ

Intrinsic Stand Off Ratio: The ratio of V₁ to V_BB known as intrinsic stand off ratio.

Ƞ =  R_B1/R_B1 + R_B2